1. Field of the Invention
The invention relates to a wiring substrate to be used in electronic devices, a multi-layered wiring substrate formed by layering films such as a build-up wiring substrate, and method of fabricating such a wiring substrate and a multi-layered wiring substrate.
2. Description of the Related Art
There has been used a wiring substrate for an assembly of an electronic device, which substrate was fabricated generally by adhering an electrically conductive layer such as a copper foil to a hard substrate composed, for instance, of glass epoxy, and patterning the electrically conductive layer into a circuit pattern. Recently, a flexible wiring substrate comprised of a resin film has been used in place of the above-mentioned wiring substrate. Hereinbelow are explained two examples of such a flexible wiring substrate.
FIG. 1 is a cross-sectional view of a conventional wiring substrate 100 as a first example. The wiring substrate 100 is disclosed in Japanese Unexamined Patent Publication No. 10-224014.
The wiring substrate 100 is comprised of an insulating layer 31 composed of polyimide resin, a first wiring layer 34 adhered to an upper surface of the insulating layer 31 through an adhesive 32, and a second wiring layer 35 adhered to a lower surface of the insulating layer 31 through an adhesive 33.
The first and second wiring layers 34 and 35 have desired patterns and are comprised of a copper foil.
The insulating layer 31 and the first and second wiring layers 34 and 35 are formed with a through-hole 36. The through-hole 36 is covered along an inner surface thereof with an electrically conductive layer 37 which electrically connects the first and second wiring layers 34 and 35 to each other.
A through-hole 39 an outer surface of which is defined by the electrically conductive layer 37 is filled with an electrically conductive or non-conductive material 38.
The electrically conductive layer 37, the electrically conductive or non-conductive material 38, and the first wiring layer 34 are covered with a resist film 40 without a part of the first wiring layer 34.
A first electrically conductive layer 41 is formed on the first wiring layer 34 in a region not covered with the resist film 40. A second electrically conductive layer 42 is formed on the second wiring layer 35.
FIG. 2 is a cross-sectional view of a conventional wiring substrate 200 as a second example. The wiring substrate 200 is disclosed in Japanese Unexamined Patent Publication No. 9-64231.
The wiring substrate 200 is comprised of an insulating layer 51 composed of polyimide resin, a first wiring layer 54 adhered to an upper surface of the insulating layer 51 through an adhesive 52, and a second wiring layer 55 adhered to a lower surface of the insulating layer 51 through an adhesive 53.
The first and second wiring layers 54 and 55 have desired patterns and are comprised of a copper foil.
The insulating layer 51 and the first wiring layer 54 are formed with a via-hole 56 reaching the second wiring layer 55. The via-hole 56 is covered along an inner surface thereof with an electrically conductive layer 57 which covers further with the second wiring layer 55 and hence electrically connects the first and second wiring layers 54 and 55 to each other.
A recess 59 an outer surface of which is defined by the electrically conductive layer 57 is filled with an electrically conductive or non-conductive material 58.
The electrically conductive layer 57, the electrically conductive or non-conductive material 58, and the first wiring layer 54 are covered with a resist film 60 without a part of the first wiring layer 54.
A first electrically conductive layer 61 is formed on the first wiring layer 54 in a region not covered with the resist film 60. A second electrically conductive layer 62 is formed on the second wiring layer 55.
As mentioned above, the conventional wiring substrates 100 and 200 are designed to have the first and second wiring layers 34, 35 and 54, 55 adhered to the insulating layers 31 and 51 through the adhesives 32, 33 and 52, 53. Namely, the conventional wiring substrates 100 and 200 have to include a substrate coated with a copper foil, resulting in an increase in fabrication cost.
In addition, since the electrically conductive layers 37 and 57 are laid on the first and second wiring layers 34, 35 and 54, 55, there are generated a step or steps formed on the first and second wiring layers 34, 35 and 54. This results in a problem that it becomes quite difficult to fabricate the wiring substrate thinner.
Furthermore, the through- or via-hole 36 or 56 is necessary to be formed smaller as a pitch between through- or via-holes becomes smaller. However, it would be more difficult to fill the through- or via-hole 36 or 56 with a filler in the conventional wiring substrates 100 and 200, if the through- or via-hole 36 or 56 were formed smaller.
Japanese Unexamined Patent Publication No. 10-125722 has suggested a two-layered wiring substrate comprised of an insulating substrate composed of an insulating material, a first copper wiring layer formed on an upper surface of the insulating substrate, a second copper wiring layer formed on a lower surface of the insulating substrate, the insulating substrate being formed with a blind via-hole extending between the first and second wiring layers throughout the insulating substrate, and a copper plating layer formed on an inner surface of the blind via-hole to electrically connect the first and second copper wiring layers to each other.
However, the above-mentioned problems remain unsolved even in the above-mentioned Publication.
In view of the above-mentioned problems in the conventional wiring substrates, it is an object of the present invention to provide a wiring substrate which makes it no longer necessary to adhere copper foils to an insulating layer, eliminates a step or steps which was (were) formed on wiring layers, and removes difficulty in filling a through- or via-hole with a filler.
It is also an object of the present invention to provide a multi-layered wiring substrate which does the same.
It is further an object of the present invention to provide a method of fabricating the above-mentioned wiring substrate and multi-layered wiring substrate.
In one aspect of the present invention, there is provided a wiring substrate including (a) an insulating layer formed with at least one tapered through-hole, (b) a first wiring layer covering an upper surface of the insulating layer therewith, (c) a second wiring layer covering a lower surface of the insulating layer therewith, and (d) an electrically conductive layer covering an inner surface of the tapered through-hole and closing the tapered through-hole at a bottom of the tapered through-hole.
It is preferable that the electrically conductive layer is integral with the first wiring layer.
It is preferable that the electrically conductive layer is integral with the second wiring layer.
It is preferable that a relation between a diameter xcfx86 of the tapered through-hole at a bottom thereof and a thickness T of the electrically conductive layer is defined as follows:
xcfx86xe2x89xa62T 
For instance, the diameter xcfx86 may be in the range of 10 to 40 micrometers both inclusive.
For instance, the thickness T may be in the range of 5 to 30 micrometers both inclusive.
For instance, the tapered through-hole may have a taper angle in the range of 15 to 65 degrees both inclusive relative to an axis of the tapered through-hole.
It is preferable that the first and second wiring layers and the electrically conductive layer are composed of copper or copper alloy, and are formed in contact with the insulating layer without applying an adhesive therebetween.
It is preferable that the first and second wiring layers and the electrically conductive layer are comprised of an electroless plating layer.
It is preferable that the first and second wiring layers and the electrically conductive layer are comprised of an electroless plating layer and an electrolytic plating layer formed on the electroless plating layer.
It is preferable that the insulating layer and the tapered through-hole have roughness in the range of 0.1 to 10 micrometers both inclusive at surfaces thereof.
It is preferable that the insulating layer and the tapered through-hole have roughness in the range of 0.5 to 5 micrometers both inclusive at surfaces thereof.
It is preferable that the wiring substrate further includes a metal layer partially or entirely covering at least one of the first and second wiring layers therewith.
It is preferable that the metal layer is comprised of a gold layer or a palladium layer. As an alternative, the metal layer may be comprised of a nickel layer and a gold layer formed on the nickel layer, or of a nickel layer and a palladium layer formed on the nickel layer.
In another aspect of the present invention, there is provided multi-layered wiring substrate including (a) a plurality of wiring substrates each of which is defined as mentioned above, (b) an interlayer insulating layer(s) sandwiched between the wiring substrates for electrically isolating the wiring substrates from each other, and (c) an interlayer electrical conductor(s) electrically connecting the second wiring layer of an upper wiring substrate to the first wiring layer of a lower wiring substrate.
For instance, the interlayer insulating layer may be composed of adhesive resin or thermoplastic resin.
It is preferable that the adhesive resin or thermo-plastic resin has a glass transition temperature of 150 degrees centigrade or greater.
It is preferable that the interlayer electrical conductor is composed of a metal selected from a group consisting of tin, lead, silver, copper, gold and aluminum.
For instance, the interlayer electrical conductor may be composed of an alloy including at least two of tin, lead, silver, copper, gold and aluminum.
It is preferable that the interlayer electrical conductor is in the form of an electrically conductive paste.
In still another aspect of the present invention, there is provided a method of fabricating a wiring substrate, including the steps of (a) forming a tapered through-hole through an insulating layer, (b) forming an electrically conductive layer covering an inner surface of the tapered through-hole therewith such that the tapered through-hole is closed at a bottom thereof, (c) forming a first wiring layer on an upper surface of the insulating layer, and (d) forming a second wiring layer on a lower surface of the insulating layer.
It is preferable that the electrically conductive layer, the first wiring layer and the second wiring layer are concurrently and integrally formed.
It is preferable that the method may further include the step of roughening the upper and lower surfaces of the insulating layer and an inner surface of the tapered through-hole.
It is preferable that the method may further include the step of applying plating catalyst to roughened upper and lower surfaces of the insulating layer and roughened inner surface of the tapered through-hole.
It is preferable that the electrically conductive layer and the first and second wiring layers are formed by electroless plating.
It is preferable that the electrically conductive layer and the first and second wiring layers are formed by electroless plating and then electrolytic plating.
It is preferable that the tapered through-hole is formed by irradiating a laser beam to the insulating layer.
It is preferable that the tapered through-hole is formed by etching the insulating layer with strong alkaline solution.
There is further provided a method of fabricating a wiring substrate, including the steps of (a) forming a tapered through-hole through an insulating layer, (b) forming a thin plating layer both entirely on upper and lower surfaces of the insulating layer and on an inner surface of the tapered through-hole, (c) forming a resist layer on the thin plating layer except first, second and third regions, (d) forming a first wiring layer in the first region, a second wiring layer in the second region, and an electrically conductive layer in the third region on the thin plating layer, the first wiring layer covering an upper surface of the insulating layer therewith, the second wiring layer covering a lower surface of the insulating layer therewith, the electrically conductive layer covering an inner surface of the tapered through-hole therewith such that the tapered through-hole is closed at a bottom thereof, (e) removing the resist layer, and (f) removing the thin plating layer having been covered with the thus removed resist layer.
It is preferable that the thin plating layer is formed by electroless plating in the step (b).
It is preferable that the first and second wiring layers and the electrically conductive layer are formed by electroless plating in the step (d).
It is preferable that the first and second wiring layers and the electrically conductive layer are formed by electrolytic plating in the step (d).
It is preferable that the first and second wiring layers and the electrically conductive layer are formed by electroless plating and then electrolytic plating in the step (d).
There is still further provided a method of fabricating a wiring substrate, including the steps of (a) forming a tapered through-hole through an insulating layer, (b) forming a resist layer both entirely on upper and lower surfaces of the insulating layer and on an inner surface of the tapered through-hole without first, second and third regions, (c) forming a first wiring layer in the first region, a second wiring layer in the second region, and an electrically conductive layer in the third region, the first wiring layer covering an upper surface of the insulating layer therewith, the second wiring layer covering a lower surface of the insulating layer therewith, the electrically conductive layer covering an inner surface of the tapered through-hole therewith such that the tapered through-hole is closed at a bottom thereof, and (d) removing the resist layer.
It is preferable that the first and second wiring layers and the electrically conductive layer are formed by electroless plating in the step (c).
It is preferable that the first and second wiring layers and the electrically conductive layer are formed by electroless plating and then electrolytic plating in the step (c).
There is yet further provided a method of fabricating a wiring substrate, including the steps of (a) forming a tapered through-hole through an insulating layer, (b) forming a first plating layer both entirely on upper and lower surfaces of the insulating layer and on an inner surface of the tapered through-hole, (c) forming a second plating layer on the first plating layer, the second plating layer having a thickness greater than a thickness of the first plating layer, (d) forming a resist layer on the second plating layer except first, second and third regions, (e) removing the second plating layer in the first, second and third regions to thereby form a first wiring layer in the first region, a second wiring layer in the second region, and an electrically conductive layer in the third region, the first and second wiring layers and the electrically conductive layer being composed of the first and second plating layers, the first wiring layer covering an upper surface of the insulating layer therewith, the second wiring layer covering a lower surface of the insulating layer therewith, the electrically conductive layer covering an inner surface of the tapered through-hole therewith such that the tapered through-hole is closed at a bottom thereof, and (f) removing the resist layer.
For instance, the first plating layer may be formed by electroless plating in the step (b). For instance, the second plating layer may be formed by electroless plating or electrolytic plating in the step (c). As an alternative, the second plating layer may be formed by electroless plating and then electrolytic plating in the step (c).
There is further provided a method of fabricating a multi-layered wiring substrate, each wiring substrate including (a) an insulating layer formed with at least one tapered through-hole, (b) a first wiring layer covering an upper surface of the insulating layer therewith, (c) a second wiring layer covering a lower surface of the insulating layer therewith, and (d) an electrically conductive layer covering an inner surface of the through-hole and closing the tapered through-hole at a bottom of the tapered through-hole, the method including the steps of (a) piling up a plurality of the wiring substrates such that the second wiring layer of an upper wiring substrate is electrically connected to the first wiring layer of a lower wiring substrate through an interlayer electrical conductor and that an interlayer insulating layer is sandwiched between upper and lower wiring substrates, and (b) applying heat to a resultant resulted from the step (a), in vacuum condition.
It is preferable that pressure is further applied to the resultant in the step (b).
For instance, the interlayer insulating layer may be formed by coating adhesive resin or thermo-plastic resin in liquid. The interlayer insulating layer may be formed by printing adhesive resin or thermoplastic resin in liquid. As an alternative, the interlayer insulating layer may be formed by transcribing adhesive resin or thermo-plastic resin in liquid.
It is preferable that the interlayer insulating layer is formed by thermally laminating adhesive resin or thermo-plastic resin which is in the form of a film.
It is preferable that the interlayer insulating layer is formed by laminating adhesive resin or thermo-plastic resin which is in the form of a film, in vacuum condition.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
In accordance with the present invention, it is no longer necessary to use a substrate which are coated at upper and lower surfaces thereof with a copper film such as a copper foil through an adhesive, unlike the conventional wiring substrates. Hence, a wiring substrate in accordance with the present invention can be fabricated at lower costs than the conventional wiring substrates.
In addition, a wiring substrate in accordance with the present invention can be fabricated thinner than the conventional wiring substrates in which an electrically conductive layer is laid on a wiring layer.
The present invention further presents a multi-layered wiring substrate providing the same advantages as mentioned above.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.